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ltc5590 1 5590p typical a pplica t ion fea t ures descrip t ion dual 600mhz to 1.7ghz high dynamic range downconverting mixer the ltc ? 5590 is part of a family of dual-channel high dy- namic range, high gain downconverting mixers covering the 600mhz to 4ghz rf frequency range. the ltc5590 is optimized for 600mhz to 1.7ghz rf applications. the lo frequency must fall within the 700mhz to 1.5ghz range for optimum performance. a typical application is a lte or gsm receiver with a 700mhz to 915mhz rf input and high side lo. the ltc5590s high conversion gain and high dynamic range enable the use of lossy if filters in high selectivity receiver designs, while minimizing the total solution cost, board space and system-level variation. a low current mode is provided for additional power savings and each of the mixer channels has independent shutdown control. wideband receiver a pplica t ions n conversion gain: 8.7db at 900mhz n iip3: 26dbm at 900mhz n noise figure: 9.7db at 900mhz n 15.6db nf under 5dbm blocking n high input p1db; 14.1dbm at 5v n 53db channel-to-channel isolation n 1.25w power consumption at 3.3v n low current mode for <800mw consumption n enable pins for each channel n 50 single-ended rf and lo inputs n lo input matched in all modes n 0dbm lo drive level n small package and solution size n C40c to 105c operation n 3g/4g wireless infrastructure diversity receivers (lte, cdma, gsm) n mimo infrastructure receivers n high dynamic range downmixer applications l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. if amp adc if amp rf 700mhz to 915mhz lna bias bias synth v ccif 3.3v or 5v 200ma v cc 3.3v 180ma 22pf 22pf 100pf 1f 22pf 1f 22pf 150nh 150nh 1nf 1nf 190mhz saw 190mhz bpf image bpf rfa rfb ena lo ena (0v/3.3v) lo 1090mhz 10pf v cca v ccb ifa + ifa ? ifb + ifb ? 5590 ta01a lo amp lo amp enb enb (0v/3.3v) rf 700mhz to 915mhz lna 100pf image bpf if amp if amp adc 150nh 150nh 1nf 1nf 190mhz saw 190mhz bpf v ccif v cc high dynamic range dual downconverting mixer family part number rf range lo range ltc5590 600mhz to 1.7ghz 700mhz to 1.5ghz ltc5591 1.3ghz to 2.3ghz 1.4ghz to 2.1ghz ltc5592 1.6ghz to 2.7ghz 1.7ghz to 2.5ghz ltc5593 2.3ghz to 4ghz 2.4ghz to 3.6ghz wideband conversion gain nf and iip3 vs if frequency (mixer only, measured on evaluation board) if frequency (mhz) 160 5 6 7 gain (db), nf (db) iip3 (dbm) 9 10 11 13 12 170 190 5590 ta01b 8 180 200 210 220 21 23 25 27 22 24 26 20 19 t c = 25c lo = 1090mhz rf = 900 30mhz test circuit in figure 1 g c iip3 nf electrical specifications subject to change
ltc5590 2 5590p p in c on f igura t ion a bsolu t e maxi m u m r a t ings mixer supply voltage (v cc )...................................... 4.0v if supply voltage (v ccif ) ......................................... 5.5v e nable voltage (ena, enb) .............. C0. 3v to v cc + 0.3v power select voltage (i sel ) ............. C0.3v to v cc + 0.3v lo input power (1ghz to 3ghz) ............................. 9dbm lo i nput dc voltage ............................................... 0.1 v rfa, rfb input power (1ghz to 3ghz) ................ 15db m rfa, rfb input dc voltage .................................... 0.1 v operating temperature range (t c ) ........ C40c to 105c sto rage temperature range .................. C65 c to 150c junction temperature (t j ) .................................... 150c (note 1) 24 23 22 21 20 19 7 8 9 top view 25 gnd uh package 24-lead (5mm 5mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 rfa cta gnd gnd ctb rfb i sel ena lo gnd enb gnd gnd ifgnda ifa + ifa ? ifba v cca gnd ifgndb ifb + ifb ? ifbb v ccb t jmax = 150c, jc = 7c/w exposed pad (pin 25) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking package description temperature range ltc5590iuh#pbf ltc5590iuh#trpbf 5590 24-lead (5mm 5mm) plastic qfn C40c to 105c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ d c e lec t rical c harac t eris t ics parameter conditions min typ max units power supply requirements (v cca , v ccb , v ccifa , v ccifb ) v cca , v ccb supply voltage (pins 12, 19) 3.1 3.3 3.5 v v ccifa , v ccifb supply voltage (pins 9, 10, 21, 22) 3.1 3.3 5.3 v mixer supply current (pins 12, 19) 188 tbd ma if amplifier supply current (pins 9, 10, 21, 22) 191 tbd ma total supply current (pins 9, 10, 12, 19, 21, 22) 379 tbd ma total supply current C shutdown ena = enb = low 500 a enable logic input (ena, enb) high = on, low = off ena, enb input high voltage (on) 2.5 v ena, enb input low voltage (off) 0.3 v ena, enb input current C0.3v to v cc + 0.3v C20 30 a turn on time 1 s turn off time 1.5 s v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = low, t c = 25c, unless otherwise noted. test circuit shown in figure 1. (note 2)
ltc5590 3 5590p d c e lec t rical c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = low, t c = 25c, unless otherwise noted. test circuit shown in figure 1. (note 2) parameter conditions min typ max units low current mode logic input (i sel ) high = low power, low = normal power mode i sel input high voltage 2.5 v i sel input low voltage 0.3 v i sel input current C0.3v to v cc + 0.3v C20 30 a low current mode current consumption (i sel = high) mixer supply current (pins 12, 19) 123 tbd ma if amplifier supply current (pins 9, 10, 21, 22) 116 tbd ma total supply current (pins 9, 10, 12, 19, 21, 22) 239 tbd ma parameter conditions min typ max units conversion gain rf = 700mhz rf = 900mhz rf = 1100mhz tbd 8.6 8.7 8.5 db db db conversion gain flatness rf = 900 30mhz, lo = 1090mhz, if = 190 30mhz 0.25 db conversion gain vs temperature t c = C40oc to 105oc, rf = 1950mhz C0.006 db/c input 3rd order intercept rf = 700mhz rf = 900mhz rf = 1100mhz tbd 25.3 26.0 24.8 dbm dbm dbm ssb noise figure rf = 700mhz rf = 900mhz rf = 1100mhz 9.3 9.7 9.9 tbd db db db parameter conditions min typ max units lo input frequency range 700 to 1500 mhz rf input frequency range low side lo high side lo 1100 to 1700 600 to 1100 mhz mhz if output frequency range requires external matching 5 to 500 mhz rf input return loss z o = 50, 700mhz to 1600mhz >12 db lo input return loss z o = 50, 700mhz to 1500mhz >12 db if output impedance differential at 190mhz 300||2.3pf r||c lo input power f lo = 700mhz to 1500mhz C4 0 6 dbm lo to rf leakage f lo = 700mhz to 1500mhz 57 db rf to if isolation f rf = 600mhz to 1700mhz >17 db channel-to-channel isolation f rf = 600mhz to 1700mhz 53 db ac e lec t rical c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = low, t c = 25c, p lo = 0dbm, p rf = C3dbm (?f = 2mhz for two tone iip3 tests), unless otherwise noted. test circuit shown in figure 1. (notes 2, 3, 4) high side lo downmixer application: i sel = low, rf = 700mhz to 1100mhz, if = 190mhz, f lo = f rf + f if
ltc5590 4 5590p parameter conditions min typ max units conversion gain rf = 900mhz 7.7 db input 3rd order intercept rf = 900mhz 21.5 dbm ssb noise figure rf = 900mhz 9.9 db input 1db compression rf = 900mhz, v ccif = 3.3v rf = 900mhz, v ccif = 5v 10.4 10.9 dbm dbm note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc5590 is guaranteed functional over the case operating temperature range of C40c to 105c. ( jc = 7c/w) note 3: ssb noise figure measured with a small-signal noise source, bandpass filter and 6db matching pad on rf input, bandpass filter and 6db matching pad on the lo input, and no other rf signals applied. note 4: channel a to channel b isolation is measured as the relative if output power of channel b to channel a, with the rf input signal applied to channel a. the rf input of channel b is 50 terminated and both mixers are enabled. ac e lec t rical c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, ena = enb = high, t c = 25c, p lo = 0dbm, p rf = C3dbm (?f = 2mhz for two tone iip3 tests), unless otherwise noted. test circuit shown in figure 1. (notes 2, 3) parameter conditions min typ max units ssb noise figure under blocking f rf = 900mhz, f lo = 1090mhz, f block = 800mhz p block = 5dbm p block = 10dbm 15.6 21.2 db db 2lo-2rf-output spurious product (f rf = f lo C f if /2) f rf = 995mhz at C10dbm, f lo = 1090mhz, f if = 190mhz C77 dbc 3lo-3rf output spurious product (f rf = f lo C f if /3) f rf = 1026.67mhz at C10dbm, f lo = 1090mhz, f if = 190mhz C77 dbc input 1db compression f rf = 900mhz, v ccif = 3.3v f rf = 900mhz, v ccif = 5v 10.7 14.1 dbm dbm high side lo downmixer application: i sel = low, rf = 700mhz to 1100mhz, if = 190mhz, f lo = f rf + f if low power mode, high side lo downmixer application: i sel = high, rf = 700mhz to 1100mhz, if = 190mhz, f lo = f rf + f if parameter conditions min typ max units conversion gain rf = 1200mhz rf = 1400mhz rf = 1600mhz 8.6 8.4 7.7 db db db conversion gain flatness rf = 1600 30mhz, lo = 1790mhz, if = 190 30mhz 0.22 db conversion gain vs temperature t c = C40oc to 105oc, rf = 1600mhz C0.008 db/c input 3rd order intercept rf = 1200mhz rf = 1400mhz rf = 1600mhz 27.5 27.3 27.2 dbm dbm dbm ssb noise figure rf = 1200mhz rf = 1400mhz rf = 1600mhz 9.9 9.7 10.4 db db db ssb noise figure under blocking f rf = 1400mhz, f lo = 1210mhz, f block = 1500mhz p block = 5dbm p block = 10dbm 15.0 20.8 db db 2rf-2lo output spurious product (f rf = f lo + f if /2) f rf = 1305mhz at C10dbm, f lo = 1210mhz, f if = 190mhz C72 dbc 3rf-3lo output spurious product (f rf = f lo + f if /3) f rf = 1273.33mhz at C10dbm, f lo = 1210mhz, f if = 190mhz C72 dbc input 1db compression rf = 1400mhz, v ccif = 3.3v rf = 1400mhz, v ccif = 5v 11.0 14.4 dbm dbm low side lo downmixer application: i sel = low, rf = 1100mhz to 1600mhz, if = 190mhz, f lo = f rf C f if
ltc5590 5 5590p conversion gain and iip3 vs rf frequency ssb nf vs rf frequency channel isolation vs rf frequency 700mhz conversion gain, iip3 and nf vs lo input power 900mhz conversion gain, iip3 and nf vs lo input power 1100mhz conversion gain, iip3 and nf vs lo input power high side lo typical ac p er f or m ance c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = low, t c = 25c, p lo = 0dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ?f = 2mhz), if = 190mhz, unless otherwise noted. test circuit shown in figure 1. conversion gain, iip3 and nf vs supply voltage (single supply) conversion gain, iip3 and nf vs supply voltage (dual supply) conversion gain, iip3 and rf input p1db vs temperature rf frequency (mhz) 600 6 7 8 ssb nf (db) 10 11 12 15 14 13 700 900 5590 g02 9 800 1000 1100 1200 16 ?40c 25c 85c 105c lo input power (dbm) ?6 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 26 ?4 0 5590 g04 12 ?2 2 4 6 28 0 8 12 16 4 20 2 10 14 18 6 22 ?40c 25c 85c iip3 nf g c lo input power (dbm) ?6 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 26 ?4 0 5590 g05 12 ?2 2 4 6 28 0 8 12 16 4 20 2 10 14 18 6 22 ?40c 25c 85c iip3 g c nf lo input power (dbm) ?6 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 26 ?4 0 5590 g06 12 ?2 2 4 6 28 0 8 12 16 4 20 2 10 14 18 6 22 ?40c 25c 85c iip3 g c nf v cc , v ccif supply voltage (v) 3 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 26 3.1 3.3 5590 g07 12 3.2 3.4 3.5 3.6 28 0 8 12 16 4 20 2 10 14 18 6 22 ?40c 25c 85c iip3 g c nf v ccif supply voltage (v) 3 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 26 3.5 4.5 5590 g08 12 4 5 5.5 28 0 8 12 16 4 20 2 10 14 18 6 22 ?40c 25c 85c iip3 g c nf rf frequency (mhz) 600 30 35 isolation (db) 45 50 700 900 5590 g03 40 800 1000 1100 1200 60 55 case temperature (c) ?40 6 8 10 g c (db), iip3 (dbm), p1db (dbm) 14 16 18 24 22 20 26 ?10 50 5590 g09 12 20 80 110 28 iip3 p1db g c v ccif = 3.3v v ccif = 5v rf frequency (mhz) 600 6 8 10 iip3 (dbm) g c (db) 14 16 18 24 22 20 700 900 5590 g01 12 800 1000 1100 1200 28 iip3 g c 26 6 7 8 10 11 12 15 14 13 9 17 16 ?40c 25c 85c 105c
ltc5590 6 5590p ssb noise figure vs rf blocker power lo leakage vs lo frequency rf isolation vs rf frequency tbd tbd tbd 2-tone if output power, im3 and im5 vs rf input power single-tone if output power, 2 2 and 3 3 spurs vs rf input power 2 2 and 3 3 spur suppression vs lo input power high side lo typical ac p er f or m ance c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = low, t c = 25c, p lo = 0dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ?f = 2mhz), if = 190mhz, unless otherwise noted. test circuit shown in figure 1. rf input power (dbm/tone) ?12 ?80 ?70 ?50 ?60 output power/tone (dbm) ?40 ?30 ?20 ?10 10 0 ?9 ?3 0 5590 g10 ?6 3 6 20 if out im5 im3 rf input power (dbm) ?12 ?80 ?70 ?60 output power (dbm) ?40 ?30 0 ?10 ?20 10 ?9 ?3 5590 g11 ?50 ?6 0 3 6 20 if out rf = 900mhz lo = 1090mhz p lo = 0dbm 3lo-3rf rf = 1026.67mhz 2lo-2rf rf = 995mhz lo input power (dbm) ?6 ?85 ?80 relative spur level (dbc) ?75 ?65 ?70 ?3 0 5590 g12 3 6 ?60 rf = 900mhz p in = ?10dbm lo = 1090mhz 3lo-3rf rf = 1026.67mhz 2lo-2rf rf = 995mhz lo frequency (mhz) lo-if 800 ?60 ?50 ?40 lo leakage (dbm) ?30 ?10 ?20 900 1100 1000 1200 5590 g14 1300 1400 0 lo-rf rf frequency (mhz) 600 0 10 20 isolation (db) 30 50 60 40 700 900800 1000 5590 g15 1100 1200 70 rf-if rf-lo rf blocker power (dbm) ?20 8 10 12 14 ssb nf (dbc) 16 22 20 18 ?15 ?5?10 0 5590 g13 5 10 24 p lo = ?3dbm p lo = 0dbm p lo = 3dbm p lo = 6dbm rf = 900mhz blocker = 800mhz
ltc5590 7 5590p typical ac p er f or m ance c harac t eris t ics conversion gain and iip3 vs rf frequency ssb nf vs rf frequency 2-tone if output power, im3 and im5 vs rf input power 700mhz conversion gain, iip3 and nf vs lo input power 900mhz conversion gain, iip3 and nf vs lo input power 1100mhz conversion gain, iip3 and nf vs lo input power low power mode, high side lo v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = high, t c = 25c, p lo = 0dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ?f = 2mhz), if = 190mhz, unless otherwise noted. test circuit shown in figure 1. conversion gain, iip3 and nf vs supply voltage (single supply) conversion gain, iip3 and nf vs supply voltage (dual supply) conversion gain, iip3 and rf input p1db vs temperature rf frequency (mhz) 600 12 13 14 iip3 (dbm) g c (db) 16 17 18 21 20 19 22 700 900 5590 g19 15 800 1000 1100 1200 23 5 9 11 13 7 15 6 10 12 14 8 16 ?40c 25c 85c 105c iip3 g c rf frequency (mhz) 600 6 8 ssb nf (db) 10 12 14 700 900 5590 g20 800 1000 1100 1200 16 ?40c 25c 85c 105c lo input power (dbm) ?6 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 ?4 0 5590 g22 12 ?2 2 4 6 8 12 16 4 20 2 10 14 18 6 ?40c 25c 85c iip3 g c nf v cc , v ccif supply voltage (v) 3 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 3.1 3.3 5590 g25 12 3.2 3.4 3.5 3.6 8 12 16 4 20 2 10 14 18 6 ?40c 25c 85c iip3 g c nf lo input power (dbm) ?6 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 ?4 0 5590 g23 12 ?2 2 4 6 8 12 16 4 20 2 10 14 18 6 ?40c 25c 85c iip3 g c nf lo input power (dbm) ?6 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 ?4 0 5590 g24 12 ?2 2 4 6 8 12 16 4 20 2 10 14 18 6 ?40c 25c 85c iip3 g c nf v cc , v ccif supply voltage (v) 3 6 8 10 g c (db), iip3 (dbm) ssb nf (db) 14 16 18 24 22 20 3.5 5590 g26 12 4 4.5 5 5.5 8 12 16 4 20 2 10 14 18 6 ?40c 25c 85c iip3 g c nf case temperature (c) ?40 6 8 10 g c (db), iip3 (dbm), p1db (dbm) 14 16 18 24 22 20 ?10 50 5590 g27 12 20 80 110 v ccif = 3.3v v ccif = 5v iip3 g c p1db rf input power (dbm/tone) ?12 ?80 ?70 ?60 ?50 ?40 ?30 ?20 output power (dbm/tone) ?9 ?3 5590 g21 ?6 0 3 6 20 10 0 ?10 im3 im5 ifout rf1 = 899mhz rf2 = 901mhz lo = 1090mhz
ltc5590 8 5590p typical ac p er f or m ance c harac t eris t ics conversion gain and iip3 vs rf frequency ssb nf vs rf frequency ssb noise figure vs rf blocker level 1200mhz conversion gain, iip3 and nf vs lo input power 1400mhz conversion gain, iip3 and nf vs lo input power 1600mhz conversion gain, iip3 and nf vs lo input power low side lo v cc = 3.3v, v ccif = 3.3v, ena = enb = high, i sel = low, t c = 25c, p lo = 0dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ?f = 2mhz), if = 190mhz, unless otherwise noted. test circuit shown in figure 1. conversion gain, iip3 and nf vs supply voltage (single supply) conversion gain, iip3 and nf vs supply voltage (dual supply) conversion gain, iip3 and rf input p1db vs temperature rf frequency (mhz) 1100 8 10 12 iip3 (dbm) g c (db) 16 18 20 30 26 28 24 22 1200 1400 5590 g28 14 6 7 8 10 11 12 15 16 14 13 9 1300 1500 1600 1700 iip3 g c ?40c 25c 85c 105c rf frequency (mhz) 1100 ssb nf (db) 1200 1400 5590 g29 6 7 8 10 11 12 15 16 14 13 9 1300 1500 1600 1700 ?40c 25c 85c 105c lo input power (dbm) ?6 g c (db), iip3 (dbm) ssb nf (db) ?4 0 5590 g31 6 10 14 18 26 30 22 0 4 8 12 20 24 iip3 16 ?2 2 4 6 ?40c 25c 85c g c nf lo input power (dbm) ?6 g c (db), iip3 (dbm) ssb nf (db) ?4 0 5590 g32 6 10 14 18 26 30 22 0 4 8 12 20 24 iip3 16 ?2 2 4 6 ?40c 25c 85c g c nf lo input power (dbm) ?6 g c (db), iip3 (dbm) ssb nf (db) ?4 0 5590 g33 6 10 14 18 26 30 22 0 4 8 12 20 24 iip3 16 ?2 2 4 6 ?40c 25c 85c g c nf v cc , v ccif supply voltage (v) 3 g c (db), iip3 (dbm) ssb nf (db) 3.1 3.3 5590 g34 6 10 14 18 26 30 22 0 4 8 12 20 24 iip3 16 3.2 3.4 3.5 3.6 ?40c 25c 85c g c nf v ccif supply voltage (v) 3 g c (db), iip3 (dbm) ssb nf (db) 3.5 5590 g35 6 10 14 18 26 30 22 0 4 8 12 20 24 iip3 16 4 4.5 5 5.5 ?40c 25c 85c g c nf case temperature (c) ?40 g c (db), iip3 (dbm), p1db (dbm) ?10 5590 g36 6 10 14 18 26 30 22 iip3 20 50 80 110 v ccif = 3.3v v ccif = 5v g c p1db rf blocker level (dbm) ?20 ssb nf (db) ?15 ?5 5590 g30 8 12 10 14 16 18 22 24 20 ?10 0 5 10 p lo = ?3dbm p lo = 0dbm p lo = 3dbm p lo = 6dbm rf = 1400mhz blocker = 1500mhz
ltc5590 9 5590p typical d c p er f or m ance c harac t eris t ics v cc supply current vs supply voltage (mixer and lo amplifier) v ccif supply current vs supply voltage (if amplifier) total supply current vs temperature (v cc + v ccif ) ena = enb = high, test circuit shown in figure 1. v cc supply current vs supply voltage (mixer and lo amplifier) v ccif supply current vs supply voltage (if amplifier) total supply current vs temperature (v cc + v ccif ) i sel = high i sel = low v cc supply voltage (v) 3 supply current (ma) 3.1 5590 g37 180 182 184 188 190 192 194 186 196 3.2 3.3 3.4 3.5 3.6 105c 85c 25c ?40c v ccif = v cc v ccif supply voltage (v) 3 supply current (ma) 3.3 5590 g38 120 140 160 180 200 220 240 260 3.6 3.9 4.2 4.5 4.8 5.1 5.4 v cc = 3.3v 105c 85c 25c ?40c case temperature (c) ?40 supply current (ma) ?10 5590 g39 280 300 320 340 360 440 420 400 380 460 480 20 50 80 110 v cc = 3.3v, v ccif = 5v (dual supply) v cc = v ccif = 3.3v (single supply) v cc supply voltage (v) 3 supply current (ma) 3.1 5590 g40 116 118 120 124 126 128 122 130 3.2 3.3 3.4 3.5 3.6 105c 85c 25c ?40c v ccif = v cc v ccif supply voltage (v) 3 supply current (ma) 3.3 5590 g41 70 90 110 130 150 170 3.6 3.9 4.2 4.5 4.8 5.1 5.4 v cc = 3.3v 105c 85c 25c ?40c case temperature (c) ?40 supply current (ma) ?10 5590 g42 180 200 220 260 240 280 300 20 50 80 110 v cc = 3.3v, v ccif = 5v (dual supply) v cc = v ccif = 3.3v (single supply)
ltc5590 10 5590p p in func t ions rfa, rfb (pins 1, 6): single-ended rf inputs for chan - nels a and b. these pins are internally connected to the primary sides of the rf input transformers, which have low dc resistance to ground. series dc-blocking capaci - tors should be used to avoid damage to the integrated transformer when dc voltage is present at the rf inputs. the rf inputs are impedance matched when the lo input is driven with a 06dbm source between 700mhz and 1.5ghz and the channels are enabled. cta, ctb (pins 2, 5): rf transformer secondary center- tap on channels a and b. these pins may require bypass capacitors to ground to optimize iip3 performance. each pin has an internally generated bias voltage of 1.2v and must be dc-isolated from ground and v cc . gnd (pins 3, 4, 7, 13, 15, 24, exposed pad pin 25): ground. these pins must be soldered to the rf ground plane on the circuit board. the exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. ifgndb, ifgnda (pins 8, 23): dc ground returns for the if amplifiers. these pins must be connected to ground to complete the dc current paths for the if amplifiers. chip inductors may be used to tune lo-if and rf-if leakage. typical dc current is 95ma for each pin. ifb + , ifb C , ifa C , ifa + (pins 9, 10, 21, 22): open-collector differential outputs for the if amplifiers of channels b and a. these pins must be connected to a dc supply through impedance matching inductors, or transformer center-taps. typical dc current consumption is 48ma into each pin. ifbb, ifba (pins 11, 20): bias adjust pins for the if amplifiers. these pins allow independent adjustment of the internal if buffer currents for channels b and a, respectively. the typical dc voltage on these pins is 2.2v. if not used, these pins must be dc isolated from ground and v cc . v ccb and v cca (pins 12, 19): power supply pins for the lo buffers and bias circuits. these pins must be con - nected to a regulated 3.3v supply with bypass capacitors located close to the pins. typical current consumption is 94ma per pin. enb, ena (pins 14, 17): enable pins. these pins allow channels b and a, respectively, to be independently en - abled. an applied voltage of greater than 2.5v activates the associated channel while a voltage of less than 0.3v disables the channel. typical input current is less than 10a. these pins must not be allowed to float. lo (pin 16): single-ended local oscillator input. this pin is internally connected to the primary side of the lo input transformer and has a low dc resistance to ground. series dc-blocking capacitors should be used to avoid damage to the integrated transformer when dc voltage present at lo input. the lo input is internally matched to 50 for all states of ena and enb. i sel (pin 18): low current select pin. when this pin is pulled low (<0.3v), both mixer channels are biased at the normal current level for best rf performance. when greater than 2.5v is applied, both channels operate at reduced current, which provides reasonable performance at lower power consumption.
ltc5590 11 5590p b lock diagra m 5590 bd bias bias gnd ena i sel lo v ccb ifbb v cca ifba ifb ? ifb + ifa ? ifa + ifgndb ifgnda gnd rfb lo amp lo amp enb gnd pass mix if amp 11 10 9 12 14 13 gnd 15 16 17 18 6 8 7 ctb 5 gnd 4 gnd 3 cta 2 rfa 1 if amp pass mix 22 21 20 19 23 24
ltc5590 12 5590p tes t c ircui t rf gnd gnd bias dc1710a board stack-up (nelco n4000-13) 0.015? 0.015? 0.062? 4:1 t1a ifa 50 c7a l2a l1a c5a c6 c3a c4 ltc5590 1 19 20 21 22 23 24 12 11 10 9 8 7 lo 50 17 18 16 15 14 c2 5 6 13 4 3 rfa 50 v ccif 3.3v to 5v 200ma c1a rfb 50 c1b 2 ifgnda gnd ifa + ifa ? ifba lo gnd gnd i sel enb ena v cca ifgnda gnd ifb + ifb ? ifbb v ccb rfa cta gnd gnd ctb rfb 5590 tc01 4:1 t1b ifb 50 c5b c3b c7b l2b l1b isel (0v/3.3v) v cc 3.3v 180ma ena (0v/3.3v) enb (0v/3.3v) l1, l2 vs if frequencies if (mhz) l1, l2 (nh) 140 270 190 150 240 100 300 56 380 33 450 22 ref des value size comments c1a, c1b 100pf 0402 avx c2 10pf 0402 avx c3a, c3b c5a, c5b 22pf 0402 avx c4, c6 1f 0603 avx c7a, c7b 1000pf 0402 avx l1, l2 150nh 0603 coilcraft t1a, t2b tc1-1w-7aln+ mini-circuits figure 1. standard downmixer test circuit schematic (190mhz)
ltc5590 13 5590p introduction the ltc5590 consists of two identical mixer channels driven by a common lo input signal. each high linearity mixer consists of a passive double-balanced mixer core, if buffer amplifier, lo buffer amplifier and bias/enable circuits. see the pin functions and block diagram sections for a description of each pin. each of the mixers can be shutdown independently to reduce power consumption and low current mode can be selected that allows a trade-off between performance and power consumption. the rf and lo inputs are single-ended and are internally matched to 50. low side or high side lo injection can be used. the if outputs are differential. the evaluation circuit, shown in figure 1, utilizes bandpass if output matching and an if transformer to realize a 50 single-ended if output. the evaluation board layout is shown in figure 2. a pplica t ions i n f or m a t ion figure 2. evaluation board layout the secondary winding of the rf transformer is internally connected to the channel a passive mixer core. the center- tap of the transformer secondary is connected to pin 2 (cta) to allow the connection of bypass capacitor, c8a. the value of c8a is lo frequency-dependent and is not required for most applications, though it can improve iip3 in some cases. when used, it should be located within 2mm of pin 2 for proper high frequency decoupling. the nominal dc voltage on the cta pin is 1.2v. for the rf inputs to be properly matched, the appropriate lo signal must be applied to the lo input. a broadband input match is realized with c1a = 100pf. the measured input return loss is shown in figure 4 for lo frequencies of 0.7ghz, 1.09ghz and 1.5ghz. these lo frequencies correspond to lower, middle and upper values in the lo range. as shown in figure 4, the rf input impedance is dependent on lo frequency, although a single value of c1a is adequate to cover the 700mhz to 1.5ghz rf band. rf inputs the rf inputs of channels a and b are identical. the rf input of channel a, shown in figure 3, is connected to the primary winding of an integrated transformer. a 50 match is realized when a series external capacitor, c1a, is con - nected to the rf input. c1a is also needed for dc blocking if the source has dc voltage present, since the primary side of the rf transformer is internally dc-grounded. the dc resistance of the primary is approximately 4.5. figure 3. channel a rf input schematic figure 4. rf port return loss ltc5590 c1a c8a rfa cta rfa to channel a mixer 1 2 5590 f03 frequency (mhz) 600 ?25 ?20 return loss (db) ?15 ?10 0 ?5 700 1100 5590 f04 800 900 1000 1200 1300 1400 lo = 700mhz lo = 1090mhz lo = 1500mhz c1 = 100pf 5590 f02
ltc5590 14 5590p the rf input impedance and input reflection coefficient, versus rf frequency, are listed in table 1. the reference plane for this data is pin 1 of the ic, with no external matching, and the lo is driven at 1.09ghz. table 1. rf input impedance and s11 (at pin 1, no external matching, f lo = 1.09ghz) frequency (ghz) rf input impedance s11 mag angle 0.6 34.2 + j24.5 0.33 107 0.7 41.3 + j22.4 0.26 97 0.8 48.5 + j18.1 0.18 84 0.9 54.3 + j10.1 0.10 61 1.0 54.2 C j4.6 0.06 C45 1.1 38.4 C j16 0.22 C116 1.2 29.3 C j9.4 0.29 C149 1.3 27.7 C j4.5 0.29 C165 1.4 27.4 C j1.6 0.29 C175 1.5 27.8 C j0.1 0.28 C180 1.6 29.4 + j0.2 0.26 179 1.7 31.2 Cj0.5 0.23 C178 a pplica t ions i n f or m a t ion figure 5. lo input schematic lo input the lo input, shown in figure 5, is connected to the primary winding of an integrated transformer. a 50 impedance match is realized at the lo port by adding an external series capacitor, c2. this capacitor is also needed for dc blocking if the lo source has dc voltage present, since the primary side of the lo transformer is dc-grounded internally. the dc resistance of the primary is approximately 4.5. the secondary of the transformer drives a pair of high speed limiting differential amplifiers for channels a and b. the ltc5590s lo amplifiers are optimized for the 700mhz to 1.5ghz lo frequency range; however, lo frequencies outside this frequency range may be used with degraded performance. the lo port is always 50 matched when v cc is applied, even when one or both of the channels is disabled. this helps to reduce frequency pulling of the lo source when the mixer is switched between different operating states. figure 6 illustrates the lo port return loss for the different operating modes. figure 6. lo input return loss the nominal lo input level is 0dbm, though the limiting amplifiers will deliver excellent performance over a 6dbm input power range. table 2 lists the lo input impedance and input reflection coefficient versus frequency. table 2. lo input impedance vs frequency (at pin 16, no external matching, ena = enb = high) frequency (ghz) input impedance s11 mag angle 0.7 29.7 + j34.7 0.46 97 0.8 39.9 + j34.1 0.37 86 0.9 48.7 + j26.6 0.26 78 1.0 50.8 + j15.1 0.15 78 1.1 46.5 + j6.2 0.07 116 1.2 39.9 + j2.5 0.12 165 1.3 34.0 + j1.4 0.19 174 1.4 29.2 + j2.1 0.26 173 1.5 25.6 + j3.8 0.33 168 lo to mixer b ltc5590 i sel 5590 f05 18 lo 16 17 ena enb c2 14 bias bias to mixer a frequency (mhz) 700 ?25 ?20 return loss (db) ?15 ?10 0 ?5 800 1200 5590 f06 900 1000 1100 1300 1400 1500 both channels on one channel on both channels off c2 = 10pf
ltc5590 15 5590p if outputs the if amplifiers in channels a and b are identical. the if amplifier for channel a, shown in figure 7, has differen- tial open collector outputs (ifa + and ifa C ), a dc ground return pin (ifgnda), and a pin for adjusting the internal bias (ifba). the if outputs must be biased at the sup- ply voltage (v ccifa ), which is applied through matching inductors l1a and l2a. alternatively, the if outputs can be biased through the center tap of a transformer (t1a). the common node of l1a and l2a can be connected to the center tap of the transformer. each if output pin draws approximately 48ma of dc supply current (96ma total). an external load resistor, r2a, can be used to improve impedance matching if desired. ifgnda (pin 23) must be grounded or the amplifier will not draw dc current. inductor l3a may improve lo-if and rf-if leakage performance in some applications, but is otherwise not necessary. inductors should have small resistance for dc. high dc resistance in l3a will reduce the if amplifier supply current, which will degrade rf performance. a pplica t ions i n f or m a t ion for optimum single-ended performance, the differential if output must be combined through an external if transformer or a discrete if balun circuit. the evaluation board (see figures 1 and 2) uses a 4:1 if transformer for impedance transformation and differential to single-ended conversion. it is also possible to eliminate the if transformer and drive differential filters or amplifiers directly. at if frequencies, the if output impedance can be modeled as 300 in parallel with 2.3pf. the equivalent small-signal model, including bondwire inductance, is shown in figure 8. frequency-dependent differential if output impedance is listed in table 3. this data is referenced to the package pins (with no external components) and includes the ef- fects of ic and package parasitics. figure 7. if amplifier schematic with bandpass match figure 8. if output small-signal model bandpass if matching the bandpass if matching configuration, shown in figures 1 and 7, is best suited for if frequencies in the 90mhz to 500mhz range. resistor r2a may be used to reduce the if output resistance for greater bandwidth and inductors l1a and l2a resonate with the internal if output capacitance at the desired if frequency. the value of l1a, l2a can be estimated as follows: l1a = l2a = 1 2 f if ( ) 2 ? 2 ? c if ? ? ? ? where c if is the internal if capacitance (listed in table 3). 4:1 t1a ifa c7a l2a l1a c5a r2a l3a (or short) v ccifa 20 21 22 23 if amp bias 100ma 4ma ifba v cca ltc5590 ignda ifa ? ifa + r1a (option to reduce dc power) 5590 f07 22 21 ifa + if a ? 0.9nh 0.9nh r if c if ltc5590 5590 f08
ltc5590 16 5590p values of l1a and l2a are tabulated in figure 1 for vari - ous if frequencies. the measured if output return loss for bandpass if matching is plotted in figure 9. table 3. if output impedance vs frequency frequency (mhz) differential output impedance (r if || x if (c if )) 90 403 || C j610 (2.9pf) 140 384 || C j474 (2.4pf) 190 379 || C j381 (2.2pf) 240 380 || C j316 (2.1pf) 300 377 || C j253 (2.1pf) 380 376 || C j210 (2.0pf) 450 360 || C j177 (2.0pf) a pplica t ions i n f or m a t ion figure 9. if output return loss with bandpass matching has been laid out to accommodate this matching topology with only minor modifications. if amplifier bias the if amplifier delivers excellent performance with v ccif = 3.3v, which allows a single supply to be used for v cc and v ccif . at v ccif = 3.3v, the rf input p1db of the mixer is limited by the output voltage swing. for higher p1db, in this case, resistor r2a (figure 7) can be used to reduce the output impedance and thus the voltage swing, thus improving p1db. the trade-off for improved p1db will be lower conversion gain. with v ccif increased to 5v the p1db increases by over 3db, at the expense of higher power consumption. mixer p1db performance at 900mhz is tabulated in table 4 for v ccif values of 3.3v and 5v. for the highest conversion gain, high-q wire-wound chip inductors are recommended for l1a and l2a. low cost multilayer chip inductors may be substituted, with a slight reduction in conversion gain. figure 10. if output with lowpass matching figure 11. if output return loss with lowpass matching 4:1 t1a ifa 50 v ccifa 3.1 to 5.3v c5a 21 22 ifa ? ifa + c7a c9a r2a l1a l2a ltc5590 5590 f10 lowpass if matching for if frequencies below 90mhz, the inductance values become unreasonably high and the lowpass topology shown in figure 9 is preferred. this topology also can provide improved rf to if and lo to if isolation. v ccifa is supplied through the center tap of the 4:1 transformer. a lowpass impedance transformation is realized by shunt elements r2a and c9a (in parallel with the internal rif and cif), and series inductors l1a and l2a. resistor r2a is used to reduce the if output resistance for greater bandwidth, or it can be omitted for the highest conver - sion gain. the final impedance transformation to 50 is realized by transformer t1a. the measured return loss is shown in figure 11 for different values of inductance (c9a = opf). the case with 82nh inductors and r2a = 1k is also shown. the ltc5590 demo board (see figure 2) frequency (mhz) 50 ?25 ?20 return loss (db) ?15 ?10 0 ?5 100 300 5590 f09 150 200 250 350 400 450 500 270nh 150nh 100nh 56nh 33nh 22nh return loss (db) ?30 ?20 ?25 ?15 ?10 0 ?5 frequency (mhz) 50 100 150 5590 f11 200 250 68nh 100nh 180nh 82nh + 1k
ltc5590 17 5590p a pplica t ions i n f or m a t ion table 4. performance comparison with v ccif = 3.3v and 5v (rf = 900mhz, high side lo, if = 190mhz) v ccif (v) r2a () i ccif (ma) g c (db) p1db (dbm) iip3 (dbm) nf (db) 3.3 open 191 8.7 10.7 26.0 9.7 1k 191 7.5 11.4 26.0 9.75 5 open 200 8.7 14.1 25.5 9.8 the ifba pin (pin 20) is available for reducing the dc current consumption of the if amplifier, at the expense of iip3. the nominal dc voltage at pin 20 is 2.1v, and this pin should be left open-circuited for optimum performance. the internal bias circuit produces a 4ma reference for the if amplifier, which causes the amplifier to draw approxi - mately 100ma. if resistor r1a is connected to pin 20 as shown in figure 7, a portion of the reference current can be shunted to ground, resulting in reduced if amplifier current. for example, r1a = 1k will shunt away 1.5ma from pin 20 and the if amplifier current will be reduced by 38% to approximately 62ma. table 5 summarizes rf performance versus if amplifier current. table 5. mixer performance with reduced if amplifier current rf = 900mhz, high side lo, if = 190mhz, v cc = v ccif = 3.3v r1 i ccif (ma) g c (db) iip3 (dbm) p1db (db) nf (db) open 95.5 8.7 26.0 10.7 9.7 4.7k 86.5 8.7 25.6 10.6 9.7 2.2k 78.3 8.6 25.0 10.6 9.6 1k 68.6 8.5 24.1 10.5 9.6 rf = 1400mhz, low side lo, if = 190mhz, v cc = v ccif = 3.3v r1 i ccif (ma) g c (db) iip3 (dbm) p1db (dbm) nf (db) open 95.5 8.4 27.3 11 9.7 4.7k 86.4 8.5 26.8 10.9 9.6 2.2k 78.2 8.5 26.2 10.9 9.6 1k 68.5 8.4 25.1 10.8 9.6 low current mode both mixer channels can be set to low current mode us- ing the i sel pin. this allows flexibility to select a reduced current mode of operation when lower rf performance is acceptable, reducing power consumption by 36%. figure 12 shows a simplified schematic of the i sel pin interface. when i sel is set low (<0.3v), both channels operate at nominal dc current. when i sel is set high (>2.5v), the dc current in both channels is reduced, thus reducing power consumption. the performance in low power mode and normal power mode are compared in table 6. figure 12. i sel interface schematic table 6. performance comparison between different power modes rf = 900mhz, high side lo, if = 190mhz, v cc = v ccif = 3.3v i sel i ccif (ma) g c (db) iip3 (dbm) p1db (dbm) nf (db) low 376 8.7 26.0 10.7 9.7 high 239 7.7 21.5 10.4 9.9 enable interface figure 13 shows a simplified schematic of the ena pin interface (enb is identical). to enable channel a, the ena voltage must be greater than 2.5v. if the enable function is not required, the enable pin can be connected directly to v cc . the voltage at the enable pin should never exceed the power supply voltage (v cc ) by more than 0.3v. if this ltc5590 18 i sel v ccb 500 v cca 5590 f13 19 bias a bias b figure 13. i sel interface schematic ltc5590 17 ena 500 v cca 5590 f13 19 esd clamp
ltc5590 18 5590p should occur, the supply current could be sourced through the esd diode, potentially damaging the ic. the enable pins must be pulled high or low. if left float - ing, the on/off state of the ic will be indeterminate. if a three-state condition can exist at the enable pins, then a pull-up or pull-down resistor must be used. supply voltage ramping fast ramping of the supply voltage can cause a current glitch in the internal esd protection circuits. depending on the supply inductance, this could result in a supply volt- a pplica t ions i n f or m a t ion age transient that exceeds the maximum rating. a supply voltage ramp time of greater than 1ms is recommended. spurious output levels mixer spurious output levels versus harmonics of the rf and lo are tabulated in tables 7 and 8 for frequencies up to 10ghz. the spur levels were measured on a standard evalution board using the test circuit shown in figure 1. the spur frequencies can be calculated using the follow - ing equation: f spur = (m ? f rf ) C (n ? f lo ) table 7. if output spur levels (dbc), high side lo (rf = 900mhz, p rf = C3dbm, p lo = 0dbm, v cc = v ccif = 3.3v, t c = 25c) n m 0 1 2 3 4 5 6 7 8 9 10 0 - C40.0 C42 C54.8 C55.7 C66.5 C81.37 C73.07 C74.33 C72.53 1 C31.8 0 C49.0 C47.4 C72.2 C64.0 C88.5 C70.3 C81.6* C81.2* * 2 C68.6 C63.0 C78.6 C73.9 C87.7 C87.8 82.3 * * * * 3 * * * C81.5 * * * * * * * 4 * * * C78.0 * * * * * * * 5 * * * * * * * * * * * 6 * * * * * * * * * * * 7 * * * * * * * * * * * 8 * * * * * * * * * * * 9 * * * * * * * * * * * 10 * * * * * * * * * * * *less than C100dbc table 8. if output spur levels (dbc), low side lo (rf = 1400mhz, p rf = C3dbm, p lo = 0dbm, v cc = v ccif = 3.3v, t c = 25c) n m 0 1 2 3 4 5 6 7 8 9 10 0 - C46.2 C42.2 C55.9 C56.9 C71.3 C67.39 C85.33 C69.93 1 C40.8 0 C44.5 C52.2 C75.0 C67.5 C78.3 C73.42 * * 2 C77.5 C74.4 C69.3 C71.7 * C86.4 C83.2 * C93.16 * * 3 * C88.74 * C76.8 C89.21 * * * * * * 4 * * * * * * * * * * * 5 * * * * * * * * * * * 6 * * * * * * * * * * * 7 * * * * * * * * * * * 8 * * C93.69 * * * * * * * 9 * * C95.59 * * * * * 10 * C94.52 * * * * * *less than C100dbc
ltc5590 19 5590p information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion uh package 24-lead plastic qfn (5mm 5mm) (reference ltc dwg # 05-08-1747 rev a) 5.00 0.10 5.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.20mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.55 0.10 23 1 2 24 bottom view?exposed pad 3.25 ref 3.20 0.10 3.20 0.10 0.75 0.05 r = 0.150 typ 0.30 0.05 (uh24) qfn 0708 rev a 0.65 bsc 0.200 ref 0.00 ? 0.05 0.75 0.05 3.25 ref 3.90 0.05 5.40 0.05 0.30 0.05 package outline 0.65 bsc recommended solder pad layout apply solder mask to areas that are not soldered pin 1 notch r = 0.30 typ or 0.35 45 chamfer r = 0.05 typ 3.20 0.05 3.20 0.05 uh package 24-lead plastic qfn (5mm 5mm) (reference ltc dwg # 05-08-1747 rev a)
ltc5590 20 5590p linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 0311 ? printed in usa r ela t e d p ar t s typical a pplica t ion downconverting mixer with lowpass if matching part number description comments infrastructure lt5527 400mhz to 3.7ghz, 5v downconverting mixer 2.3db gain, 23.5dbm iip3 and 12.5db nf at 1900mhz, 5v/78ma supply lt5557 400mhz to 3.8ghz, 3.3v downconverting mixer 2.9db gain, 24.7dbm iip3 and 11.7db nf at 1950mhz, 3.3v/82ma supply ltc6416 2ghz 16-bit adc buffer 40.25dbm oip3 to 300mhz, programmable fast recovery output clamping ltc6412 31db linear analog vga 35dbm oip3 at 240mhz, continuous gain range C14db to 17db ltc554x 600mhz to 4ghz downconverting mixer family 8db gain, >25dbm iip3, 10db nf, 3.3v/200ma supply lt5554 ultralow distort if digital vga 48dbm oip3 at 200mhz, 2db to 18db gain range, 0.125db gain steps lt5578 400mhz to 2.7ghz upconverting mixer 27dbm oip3 at 900mhz, 24.2dbm at 1.95ghz, integrated rf transformer lt5579 1.5ghz to 3.8ghz upconverting mixer 27.3dbm oip3 at 2.14ghz, nf = 9.9db, 3.3v supply, single-ended lo and rf ports rf power detectors LTC5581 6ghz low power rms detector 40db dynamic range, 1db accuracy overtemperature, 1.5ma supply current ltc5582 10ghz rms power detector 40mhz to 10ghz, up to 57db dynamic range, 0.5db accuracy overtemperature ltc5583 dual 6ghz rms power detector measures vswr 40mhz to 6ghz, up to 60db dynamic range, >40db channel-to-channel isolation, difference output for vs wr measurement adcs ltc2285 14-bit, 125msps dual adc 72.4db snr, >88db sfdr, 790mw power consumption ltc2185 16-bit, 125msps dual adc ultralow power 74.8db snr, 185mw/channel power consumption ltc2242-12 12-bit, 250msps adc 65.4db snr, 78db sfdr, 740mw power consumption 4:1 t1a ifa 50 82nh 82nh 22pf 1f 1k 22pf 1f ltc5590 channel a channel b not shown 1 19 20 21 22 23 24 lo 50 17 18 16 15 10pf 4 3 rfa 50 v ccif 3.3v to 5v 191ma v cc 3.3v 188ma to channel b (96ma) to channel b (94ma) 100pf 2 ifgnda gnd ifa + ifa ? ifba lo gnd i sel ena v cca rfa cta gnd gnd 5590 ta02 i sel ena conversion gain, nf and iip3 vs rf frequency rf frequency (mhz) 700 7 8 9 10 gain (db), ssb nf (db) iip3 (dbm) 12 13 14 16 15 800 1000 5590 ta02b 11 900 1100 1200 20 22 24 26 21 23 25 19 18 17 t c = 25c if = 140mhz g c iip3 nf

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